华为将不依赖更小制程节点，通过封装与架构创新来扩展其昇腾AI芯片。根据何庭波的论文，华为计划在2025年至2030年间，通过Chiplets、2.5D扇出封装和3D堆叠技术，推进其昇腾SuperPoD系列，具体产品包括2025年的910C、2026年的950及后续的990。约2030年，Ascend 990将引入LogicFolding技术，目标是到2035年实现100倍的集成度跃升。
Huawei plans to scale AI chips without smaller nodes.
A new paper by Huawei's He Tingbo, "A Time Scaling Theory for Multi-Layer Electronic Systems," outlines how they'll advance Ascend AI chips as transistor shrinking slows down.
Instead of next-gen lithography, Huawei will scale its Ascend SuperPoD line through ~2030 by packing mature tech across the 2025 910C, 2026 950, and 990:
🔹 Chiplets
🔹 2.5D fan-out packaging
🔹 3D stacking (via micro-bumps & hybrid bonding)
Around 2030, Ascend 990 will debut LogicFolding in AI accelerators, aiming for a 100x integration leap by 2035.
来源：X.PIN · x.com